The Computer Engineering Program is extremely fortunate to have an advisory board of highly-respected leaders in our field who volunteer their time and lend us their vision on research, education, and diversity as they relate to our growing program.
The board was formed in 2008 and meets annually. Members come from a variety of academic and industrial backgrounds and all have particular insight into building world-class computer engineering organizations.
David E. Culler (Advisory Board Chair), Professor, University of California, Berkeley
David E. Culler received his B.A. from UC Berkeley, 1980, and a M.S. and Ph.D. from MIT, 1985 and 1989 respectively. He joined the EECS faculty in 1989 and is the founding Director of Intel Research, UC Berkeley. He is a member of the National Academy of Engineering, an ACM Fellow, and was selected in Scientific American Top 50 Researchers and Technology Review 10 Technologies that Will Change the World. He was awarded the NSF Presidential Young Investigator and the Presidential Faculty Fellowship. His research addresses networks of small, embedded wireless devices, planetary-scale internet services, parallel computer architecture, parallel programming languages, and high performance communication. This includes TinyOS, Berkeley Motes, PlanetLab, Networks of Workstations (NOW), Internet services, Active Messages, Split-C, and the Threaded Abstract Machine (TAM).
Joel S. Emer, Intel Fellow and Architecture Group Director, Microarchitecture Research, Intel Corp.
Joel Emer is an Intel Fellow and Director of Microarchitecture Research at Intel in Hudson, Massachusetts. Previously he worked at Compaq and Digital Equipment Corporation where he has held various research and advanced development positions investigating processor microarchitecture for a variety of VAX and Alpha processors and developing performance modeling and evaluation techniques. His research included pioneering efforts in simultaneous multithreading, analysis of the architectural impact of soft errors and early contributions to the now pervasive quantitative approach to processor evaluation. His current research interests include memory hierarchy design, processor reliability, reconfigurable logic-based computation and performance modeling. In his spare time, he serves as visiting faculty at MIT.
Emer received a bachelor's degree with highest honors in electrical engineering in 1974, and his master's degree in 1975 -- both from Purdue University. He earned a doctorate in electrical engineering from the University of Illinois in 1979. Emer holds over 25 patents and has published more than 35 papers. He is a Fellow of both the ACM and the IEEE, and was the 2009 recipient of the Eckert-Mauchly award for lifetime contributions in computer architecture.
Margaret Martonosi, Professor, Princeton University
Margaret Martonosi is currently Professor of Electrical Engineering at Princeton University, where she has been on the faculty since 1994. She also holds an affiliated faculty appointment in Princeton Computer Science.
Martonosi's research interests are in computer architecture and the hardware/software interface, with particular focus on power-efficient systems and mobile computing. In the field of processor architecture, she has done extensive work on power modeling and management and on memory hierarchy performance and energy. This has included the development of the Wattch power modeling tool, the first architecture level power modeling infrastructure for superscalar processors. Her memory hierarchy work has included early performance-oriented studies, as well as more recent work on energy-aware memory hierarchies. In the field of mobile computing and sensor networks, Martonosi led the Princeton ZebraNet project, which included two real-world deployments of tracking collars on Zebras in Central Kenya. She is now co-leader of the Sarana project, which is building software interfaces for collaborative computing among mobile devices.
Martonosi is a Fellow of both IEEE and ACM. She is co-author on over 100 refereed publications and a technical reference book on power-aware computer architecture and inventor on six granted US patents. She recently completed two terms as vice-chair of ACM SIGARCH, where she now serves on the Board of Directors. She is also on the board of CRA and CRA-W. Martonosi completed her Ph.D. at Stanford University, and also holds a Master's degree from Stanford and a bachelor's degree from Cornell University, all in Electrical Engineering.
Gee Rittenhouse, Vice President of Bell Labs Research, Alcatel-Lucent
Gee Rittenhouse is a VP of Bell Labs Research, overseeing all Bell Labs research centers and research activities. Prior to this he headed the Bell Labs' Technology Integration Group, with the primary mission of taking Bell Labs research assets and innovations and driving them, through development activities and project management, into Alcatel-Lucent products and services. In this position Gee was closely connected with all of Alcatel-Lucent's business divisions, interlocking their needs and strategies with Bell Labs' research activities, priorities, and innovations areas. Prior to heading up Technology Integration, Gee was Vice President, Bell Labs Wireless Research.
He received his Bachelor of Science degree in physics from the University of California, Los Angeles in 1986. Then in 1993 he received his Ph.D. degree in Electrical Engineering and Computer Science from the Massachusetts Institute of Technology. He joined Bell Laboratories as a member of technical staff in 1993 where he worked on high-speed circuits using X-ray lithography for optical networking applications. He later joined the Wireless Research Laboratory at Bell Laboratories where his research focused on RF front-end radio architectures and cellular system engineering. In 2000 he was promoted to Director of the Wireless Technology Research Department and led several projects including MIMO system development, cellular network optimization, wireless IP networks, and fourth generation wireless systems. In 2002 he received the Bell Labs Fellow Award. He has numerous publications and patents in the areas of communications and circuits.
John R. White, ACM Executive Director and Chief Executive Officer
Dr. John R. White has served as ACM Executive Director and Chief Executive Office since January 1999. As CEO Dr. White is responsible for working with ACM senior leadership (the officers, the board of directors, and over 1,000 volunteers) in setting and delivering ACM’s strategic direction. During John’s tenure, ACM membership has grown to an all-time high, its scholarly publishing program has doubled in size, and the Association is increasingly involved in issues related to the image and health of the computing discipline and field worldwide.
Prior to joining ACM, John was Manager of the Computer Science Laboratory at the Xerox Palo Alto Research Center (PARC). White spent seventeen years at Xerox PARC leading several research groups, including the PARC group that developed and delivered DocuPrint, Xerox’ series of high-end, high-speed networked printing products. As head of the Computer Science Lab, he managed research teams exploring future offerings in networked electronic document systems, services, and commerce. Prior to his tenure at Xerox PARC, White was a Professor of Computer Science at the University of Connecticut.
Dr. White has been a long-time advocate of the ACM, serving as its President from 1990-92, as well as assuming many key ACM volunteer roles over the past two decades.
Dr. White received his Ph.D. in computer science, M.S. in computer science, and B.A. in mathematics, all from the University of California, Santa Barbara. He has a number of refereed publications and holds a US patent. He is a Fellow of the ACM, a recipient of the ACM Outstanding Contribution award, as well as a Xerox PARC Excellence in Science and Technology Award. Dr. White has served on the boards of the Computing Research Association, Computing Sciences Accreditation Board, and the Publishers International Linking Association (CrossRef).